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고객사에 기밀을 요하는 포지션은 본 란에 게재되지 않습니다.

RTL Frontend Engineer_PI
외국계 IT 솔루션 개발/서비스 전문 기업
팀장급(차~부장),중간관리자급(과장),실무자급(대리이하)
직무 개요
- Physical Implementation Engineer

경력 요건
Solid experience in developing and owning full chip timing constraints for a complex, multi-voltage SoCs
- Solid experience in running physical-aware logic synthesis (DC-G or Genus) and achieving optimal synthesis QoR on high-performance and low power designs 
Solid experience in developing power intent using UPF and running static low power verification tool like Synopsys VC-LP or
similar tools 
Solid experience in running gate level power estimation using Synopsys PrimeTime-PX 
Developing the timing constraints and running the full-chip logic synthesis 
Collaborating with DSP to accomplish the design closure for tape-out 
- Block-level PPA analysis for marketing and sales/BD support 
Samsung design methodology support for ASIC customers 
- Good understanding of chip floor plan to get the best PPA during physical-aware synthesis     

◈ 처우
- Negotiable

◈ 제출 기한
- ASAP

◈ 제출 서류 및 기타
- 국/영문 이력서 

◈ 담당 컨설턴트
- 안상녀 / 02-2016-6680 / anne@vpeople.co.kr